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<p>Since many metropolitan-area optical equipment manufacturers are introducing architectures in the first half of 2000, expect the Chromatis and Quantum Bridge concepts to be merely the first shots across the bow in a marketing battle where many new wavelength-assignment concepts will be launched on a regular basis. Frequency division multiplexing (FDM), common in wireless networks, is expected to find many adherents in the future. The TalonMX product from Kestrel Solutions Inc. is the first among what is anticipated to be at least three or four optical players in the FDM modulation arena.</p>

Supported translations are ASCII to Binary, Binary to ASCII, ASCII to Hex, Hex to ASCII, Binary to Hex, Hex to Binary, Backwards, Caesar Bruteforce, Igpay Atinlay (Pig Latin), Un-Pig Latin, … and many others. You may not be surprised to hear that I immediately lost all interest in URL encryption and spent a happy time playing with the Pig Latin translator.

Smith said the unification announcement is especially timely because more designers are using a mix of the two languages. In a recent EDA market study, Smith predicted that by 2001, the HDL simulation market will largely be dominated by mixed-language simulators and that sales of simulators supporting only one language will drop to zero.

OVI and VHDL International should have done this five years ago,” he said.

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Divisive past

Five years ago, though, the two organizations were bickering over which had the better language. But since that time, the two groups have progressively put aside their differences and collaborated in several key areas. They mutually hammered out such standards as the Standard Delay Format; consistent ASIC function and timing support; and synthesis styles for both languages.

With the Silicon Integration Initiative (Si2), they crafted the Delay and Power Calculation system and the Advanced Library Format. And with the Virtual Socket Interface Alliance (VSIA), the two groups defined the Design Constraints standard.

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We had co-sponsored several working groups to promote the use of HDLs for pc-board and FPGA designers,” said OVI's Brophy. Both languages have been enhanced by these collaborative efforts.”

Andy Graham, president of Si2, called the move a positive step because it puts the emphasis on anticipating emerging design-language requirements for customers and vendors.” And Howard Sachs, president of VSIA, called the development one of those rare instances where it is a 'win-win' for everybody.”

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Last year, OVI and VHDL International also melded their respective conferences into the International HDL Conference, which will take place Thursday and Friday at the Santa Clara Convention Center.

The move to broaden out from HDLs to system-level languages comes as the EDA industry is striving to build such languages on top of the HDL tool structure. OVI and VHDL have done a good job of promoting their respective languages; a similar focus will be needed at the system level,” said Graham of Si2. With three system-level language candidates already in the field, the timing is right for this move.”

Application-specific software libraries are also planned, including optical character recognition, 3-D analysis and spatial organization.

BEV lists possible applications for the GVPP in process monitoring, quality control and assembly; automotive systems such as intelligent air bags that monitor passenger size and traffic congestion monitors; pedestrian detection, license plate recognition, electronic toll collection, automatic parking management, automatic inspection; and medical uses including disease identification. The chip could also prove useful in unmanned air vehicles, miniature smart weapons, ground reconnaissance and other military applications, as well as in security access using facial, iris, fingerprint, or height and gait identification.

In a move to extend plug-and-play capability for PC peripherals and a range of embedded computing systems, eight companies on Monday publicly endorsed Intel's proposal to simplify development of second-generation USB products with a standard interface between 2.0 USB transceivers and the parallel interface engine.

Supporting the USB 2.0 Transceiver Macrocell Interface (UTMI) are inSilicon, Hewlett-Packard, Intel, Lucent, Cypress, STMicroelectronics, Texas Instruments, Fujitsu, and Kawasaki LSI. The USB 2.0 standard increases the speed of serial connections between devices by 40 times, to 480 megabits per second, compared to 12 Mbits/s with the current USB 1.1 specification.

The new transceiver interface is intended to improve interoperability between new USB 2.0 products from different IC manufacturers. Supporters of the UTMI spec compared the partitioning of USB 2.0 functions to the Ethernet Media Independent Interface standard, which defines the communication interface between physical layer 1 PHYs and layer 2 media access controllers.